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NVIDIA Hopper Architecture

NVIDIA H100 Tensor Core GPU

The NVIDIA H100 Tensor Core GPU enables an order-of-magnitude leap for large-scale AI and HPC with unprecedented performance, scalability, and security for every data center and includes the NVIDIA AI Enterprise software suite to streamline AI development and deployment. With NVIDIA® NVLink® Switch System direct communication between up to 256 GPUs, H100 accelerates exascale scale workloads with a dedicated Transformer Engine for trillion parameter language models. For small jobs, H100 can be partitioned down to right- sized Multi-Instance GPU (MIG) partitions. With Hopper Confidential Computing, this scalable compute power can secure sensitive applications on shared data center infrastructure. The inclusion of the NVIDIA AI Enterprise software suite reduces time to development and simplifies deployment of AI workloads and makes H100 the most powerful end-to-end AI and HPC data center platform.

H100 PCIe with Colfax Systems

H100 SXM with Colfax Systems

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H100 SXM

H100 PCIe

FP64

34 teraFLOPS

26 teraFLOPS

FP64 Tensor Core

67 teraFLOPS

51 teraFLOPS

FP32

67 teraFLOPS

51 teraFLOPS

TF32 Tensor Core

989 teraFLOPS*

756 teraFLOPS*

BFLOAT16 Tensor Core

1,979 teraFLOPS*

1,513 teraFLOPS*

FP16 Tensor Core

1,979 teraFLOPS*

1,513 teraFLOPS*

FP8 Tensor Core

3,958 teraFLOPS*

3,026 teraFLOPS*

INT8 Tensor Core

3,958 TOPS*

3,026 TOPS*

GPU Memory

80GB

80GB

GPU Memory Bandwidth

3.35TB/s

2TB/s

Decoders

7 NVDEC
7 JPEG

7 NVDEC
7 JPEG

Max Thermal Design Power (TDP)

Up to 700W (configurable)

300-350W (configurable)

Multi-Instance GPUs

Up to 7 MIGS @ 10GB each

Form Factor

SXM

PCIe
Dual-slot air-cooled

Interconnect

NVLink: 900GB/s PCIe Gen5: 128GB/s

NVLINK: 600GB/s PCIe Gen5: 128GB/s

Server Options

NVIDIA HGX™ H100
NVIDIA DGX™ H100 with 8 GPUs
Colfax NVIDIA-Certified Systems™ with 4 or 8 GPUs

Colfax NVIDIA-Certified Systems™ with 1-8 GPUs

NVIDIA AI Enterprise

Add-on

Included

* Shown with sparsity. Specifications are one-half lower without sparsity.
** Preliminary specifications. May be subject to change.

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